Layout vs. Schematic in VLSI Physical Design using NETGEN - Ep:1
In this video, we delve into several important topics related to VLSI Physical Design, focusing on the comparison between Layout and Schematic. We explore the overall design flow and introduce the concept of Layout Versus Schematic (LVS), including its basics, purpose, and significance. The discussion also covers the process overview, typical challenges encountered in LVS, and strategies for identifying and debugging common issues. Additionally, we introduce NETGEN, an essential tool for netlist comparison, and explain the importance of the setup file and how valid filenames are defined. The video further provides a detailed breakdown of various NETGEN command types, including those used for running the tool, manipulating netlists, and performing netlist comparisons.
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Chapters for easy navigation:
00:00 Beginning & Intro
00:46 Chapter Index
02:02 Design Flow and LVS
06:32 Basics of LVS
08:38 Process Overview & Challenges
10:25 Layout vs. Schematic Flow
12:56 LVS Issues and Debug
15:13 NETGEN
15:30 About NETGEN
17:09 Significance of Setupfile
19:45 What is valid_filename?
21:10 NETGEN Command Types
21:22 Running NETGEN
22:35 Netlist Manipulation Commands
23:48 Netlist Manipulation Commands
25:05 Netlist Comparison Commands
26:27 Netlist Comparison Commands
27:32 Netlist Comparison Commands
28:48 Netlist Comparison Commands
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