Clock Gating | Integrated Clock Gating cell
The video explains clock gating and the importance of clock gating.
Clock is the periodic synchronisation signal in synchronous digital systems and accounts for about 40% of the total power dissipation of the entire system. For power reduction, Clock Gating is the most widely technique used and one must thoroughly understand this concept.
Clock gating by mere AND gate is not sufficient to meet all the design requirements. The introduction of Integrated Clock Gating Cell is remarkable and it easily solves the issues with traditional approaches.
Understanding Integrated Clock Gating Cells (ICGs) is the very import if you like VLSI design.
